Voltage Control of FPGA and CPLD Devices

Abstract

Power consumption of components is of high importance to circuit designers. Lowering the power consumption of the components in the circuit can help the circuit be more energy efficient and lower the heat dissipated to the rest of the circuit. FPGAs and CPLDs are devices found in circuits. Depending on the digital circuit programmed onto them, the recommended supply voltage may be too large. The devices may be able to use a lower supply voltage while maintaining a high degree of accuracy. If this is the case, then an opportunity exists to save power and become more energy efficient while simultaneously decreasing the heat dissipated to the rest of the circuit. This paper aims to answer that question. The initial approach was to isolate the device and test it directly. This method had problems however, as we were not able to program the devices purchased with the materials at hand. Another approach was tried using an Altera DE2 Board which contains a Cyclone II FPGA. However, no change could be seen in the current consumed by the FPGA for various circuits because the DE2 consumed much more current than the FPGA and more precise measuring instruments would be needed. To fully test this idea, the FPGA or CPLD would need to be isolated. Even though our attempts were unsuccessful, a large amount of design work was put into the circuit and is included in this paper.